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Thread: CVData test on Intel’s new chip

  1. #1
    Random number herder Norm's Avatar
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    CVData test on Intel’s new chip

    I’ve replaced my four year old PC with a new PC with Intel’s recently announced 12th gen (Alder Lake) CPU and have been curious about how the dramatically changed chip architecture affects simulations. A standard, one hand CVData simulation ran ten billion rounds in 90 seconds, or about 110 million rounds per second. This is about four times the older PC. Of course, a more complex sim will take longer. This is vastly faster than the equipment I used to run the Blackjack Attack Chapter X sims.

    Some notes. The old PC (I7-8700K) was substantially overclocked with increased voltage and higher frequencies on all cores. The new PC (I9-12900KF) ran with standard settings as I have not yet overclocked. The RAM is currently running below specs and will be increased in frequency by 8%. The old PC was running at 95-100% CPU. I only ran 16 of the 24 threads on the new PC, so it was running about 85-90% and temperature peaked at 70C, which leaves some room. (Note, I was using task manager for CPU measurements which is notoriously inaccurate.) I am using Win10. The Thread Director in the new chip, which theoretically increases performance, is only supported by Win11. So, it looks like I can find substantially more speed.

    Last upgrade I made was a disappointment. This one was more than I expected. Of course, this is vastly faster than the first multi-million dollar mainframe I used.
    "I don't think outside the box; I think of what I can do with the box." - Henri Matisse

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    Hey Norm, I also just got a newfangled PC. I was going to install the various CV programs and then I realized...there's no CD drive. The "tower" is all inside the relatively flat monitor. What are my options? I think I probably have to get an external CD drive with a USB connection. I see some that I can purchase for less than $25.

    My three CV disks are copyright 2010 & 2011. How do I get updates?

    I managed to make my previous PC last about 11 years.

  3. #3
    Random number herder Norm's Avatar
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    You can download. Email me: [email protected]
    "I don't think outside the box; I think of what I can do with the box." - Henri Matisse

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    What made you choose Alder Lake over previous gens? DDR5 capability?

    Didn't like the Zen3 offers from AMD?

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    Random number herder Norm's Avatar
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    The Intel 11th gen was a lousy placeholder. DDR5 is not yet of value, although I had to get it anyway. PCIe5 is also currently useless. But, the many benchmarks show Alder Lake seriously outclassing Zen3 in both single and multi thread workloads. It even usually beats the $200 more expensive AMD 5950X, despite the AMD chip having eight more threads and eight performance cores. This is helped by the new transistor and capacitor designs that allow 7nm density with 10nm fabrication. I'm also interested in how well the architecture of two core designs on one chip works. I think this will work very well with blackjack simulation.
    "I don't think outside the box; I think of what I can do with the box." - Henri Matisse

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    Quote Originally Posted by Norm View Post
    The Intel 11th gen was a lousy placeholder. DDR5 is not yet of value, although I had to get it anyway. PCIe5 is also currently useless. But, the many benchmarks show Alder Lake seriously outclassing Zen3 in both single and multi thread workloads. It even usually beats the $200 more expensive AMD 5950X, despite the AMD chip having eight more threads and eight performance cores. This is helped by the new transistor and capacitor designs that allow 7nm density with 10nm fabrication. I'm also interested in how well the architecture of two core designs on one chip works. I think this will work very well with blackjack simulation.
    Huh...I've heard the opposite from others.

    big.LITTLE is an experimental thing for Intel right now, correct?

  7. #7
    Random number herder Norm's Avatar
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    I wouldn't call big.LITTLE experimental at all. It's in most Alder Lake chips, and will be in Raptor Lake in 2022 and Meteor Lake in 2023. It includes desktop, mobile, and ultra-mobile. Meteor Lake is already taped at 7nm, the equivalent of TSMC's 4nm. I think they've already powered on a Meteor Lake compute tile. The argument for efficiency cores is clear with mobile. I think less clear with desktop, particularly with the rumored Raptor Lake 8P+16E configuration. But, the little cores are not that slow. They don't have hyper-threading. But, my casual observation is that hyper-threading has become less and less useful as chips become more and more clever about keeping their ports busy. I'd rather use an efficiency core over the second thread of a performance core. I believe the thread director guides high usage threads first to the P cores and then the E cores before utilizing hyper-threading.
    "I don't think outside the box; I think of what I can do with the box." - Henri Matisse

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    Quote Originally Posted by Norm View Post
    I wouldn't call big.LITTLE experimental at all. It's in most Alder Lake chips, and will be in Raptor Lake in 2022 and Meteor Lake in 2023. It includes desktop, mobile, and ultra-mobile. Meteor Lake is already taped at 7nm, the equivalent of TSMC's 4nm. I think they've already powered on a Meteor Lake compute tile. The argument for efficiency cores is clear with mobile. I think less clear with desktop, particularly with the rumored Raptor Lake 8P+16E configuration. But, the little cores are not that slow. They don't have hyper-threading. But, my casual observation is that hyper-threading has become less and less useful as chips become more and more clever about keeping their ports busy. I'd rather use an efficiency core over the second thread of a performance core. I believe the thread director guides high usage threads first to the P cores and then the E cores before utilizing hyper-threading.
    Cool.

    I could see this for low powered computing like a home entertainment system.

    Not sure about Workstations though.

    Are you interested in optimizing CV for the big.LITTLE feature?

  9. #9
    Random number herder Norm's Avatar
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    There are rumors entry level workstations will use an Alder Lake based Xeon chip. Not for power workstations though.

    I'll fiddle with CVData using big.LITTLE. I have some old code that avoids loops, but executes fewer instructions, while having more instructions. This was speedier in older architectures. Occurs to me that with better branch prediction, this may not be an efficient use of the L1 cache. I'm focused more on cache usage and wish we could see cache hit ratios. CVData keeps a lot of data, which keeps a lot of memory busy when running 20 threads.
    "I don't think outside the box; I think of what I can do with the box." - Henri Matisse

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